Instruction set:
The PIC 18 instructions fall into five categories:
1. Byte-Oriented File Register Operands
2. Bit Oriented Register Operands
3. Control Operands
4. Literal Operations
5. Data Memory to and from program memory operations
Byte-Oriented File Register Operands
The PIC 18 instructions fall into five categories:
1. Byte-Oriented File Register Operands
2. Bit Oriented Register Operands
3. Control Operands
4. Literal Operations
5. Data Memory to and from program memory operations
Byte-Oriented File Register Operands
There are two groups of instructions in this category. In the first group, the operation is performed on the file register and the result is placed back in the file register.In the second group, the operation involves both fileReg and WREG.
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Mnemonic Operand Description Cycles
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ADDWF f,d,a Add WREG and f 1
ADDWFC f,d,a Add WREG and carry bit to f 1
ANDWF f,d,a AND WREG with f 1
CLRF f,a Clear f 1
COMF f,d,a Compliment f 1
CPFSEQ f,a Compare f with WREG skip- 1(2 or3)
CPFSGT f,a Compare f with WREG skip> 1(2 or3)
CPFSLT f,a Compare f with WREG skip< 1(2 or3)
DECF f,d,a Decrement f 1
DECFSZ f,d,a Decrement f ,skip if 0 1(2 or3)
DCFSNZ f,d.a Decrement f ,skip if not 0 1(2 or3)
INCF f,d,a Increment f 1
INCFSZ f,d,a Increment f ,skip if 0 1(2 or3)
INFSNZ f,d,a Increment f ,skip if not 0 1(2 or3)
IORWF f,d,a Inclusive OR WREG with f 1
MOVWF f,a Move WREG to f 1
MULWF f,a Multiply WREG to f 2
MOVF f,d,a Move f 1
MOVFF fs,fd Move fs to fd 1
NEGF f,a Negate f 1
RLCF f,d,a Rotate left f through carry 1
RLNCF f,d,a Rotate left f (no carry) 1
RRCF f,d,a Rotate right f through carry 1
RRNCF f,d,a Rotate right f (no carry) 1
SETF f,a Set f 1
SUBFWB f,d,a Subtract from WREG with borrow 1
SUBWF f,d,a Subtract WREG from f 1
SUBWFB f,d,a Subtract WREG from f with borrow 1
SWAPF f,d,a Swap nibbles in f 1
TSTFSZ f,a Test f,skip if 0 1(2 or3)
XORWF f,d,a Exclusive OR WREG with f 1
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Bit Oriented Register Operands
The bit-oriented instructions perform operations on a specific bit of a file register. After the operation, the result is placed back in the same file register.
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Mnemonic Operand Description Cycles
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BCF f,b,a Bit clear f 1
BSF f,b,a Bit set f 1
BTFSC f,b,a Bit test f, skip if clear 1(2 or3)
BTFSS f,b,a Bit test f , skip if set 1(2 or3)
BTG f,b,a Bit toggle 1
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Control Operands
The control instructions such as branch and call deal mainly with flow control.
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Mnemonic Operand Description Cycles
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BC n Branch f carry 1
BN n Branch f negative 1
BRA n Branch Unconditionally 2
BNN n Branch f not negative 1
BNOV n Branch f not overflow 1
BNZ n Branch f not zero 1
BOV n Branch f overflow 1
NOP n No operation 1
BZ n Branch f zero 1
CALL n.s Call subroutine 2
POP Pop top of return Address 1
NOP No operator 1
PUSH Push top of return Address 1
RCALL n Relative call 2
RESET software device reset 1
RETURN s Return from subroutine 2
SLEEP Go into standby mode 1
RETLW k Return with literal in WREG 2
GOTO n Go to address 1st word 2
2nd word
CLRWDT - Clear Watchdog Timer 1
DAW - Decimal Adjust WREG 1
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Literal Operations
Mnemonic Operand Description Cycles
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ADDLW k Add literal and WREG 1
ANDLW k AND literal with WREG 1
IORLW k Inclusive OR literal with WREG 1
LFSR f, k Move literal (12-bit)2nd word 2
to FSRx 1st word
MOVLB k Move literal to BSR <3:0> 1
MOVLW k Move literal to WREG 1
MULLW k Multiply literal with WREG 1
RETLW k Return with literal in WREG 2
SUBLW k Subtract WREG from literal 1
XORLW k Exclusive OR literal with WREG 1
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Data Memory to and from program memory operations
Mnemonic Operand Description Cycles
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TBLRD * Table Read 2
TBLRD *+ Table Read with post-increment 2
TBLRD *- Table Read with post-decrement 2
TBLRD +* Table Read with pre-increment 2
TBLWT * Table Write 2
TBLWT *+ Table Write with post-increment 2
TBLWT *- Table Write with post-decrement 2
TBLWT +* Table Write with pre-increment 2
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ADDWFC f,d,a Add WREG and carry bit to f 1
ANDWF f,d,a AND WREG with f 1
CLRF f,a Clear f 1
COMF f,d,a Compliment f 1
CPFSEQ f,a Compare f with WREG skip- 1(2 or3)
CPFSGT f,a Compare f with WREG skip> 1(2 or3)
CPFSLT f,a Compare f with WREG skip< 1(2 or3)
DECF f,d,a Decrement f 1
DECFSZ f,d,a Decrement f ,skip if 0 1(2 or3)
DCFSNZ f,d.a Decrement f ,skip if not 0 1(2 or3)
INCF f,d,a Increment f 1
INCFSZ f,d,a Increment f ,skip if 0 1(2 or3)
INFSNZ f,d,a Increment f ,skip if not 0 1(2 or3)
IORWF f,d,a Inclusive OR WREG with f 1
MOVWF f,a Move WREG to f 1
MULWF f,a Multiply WREG to f 2
MOVF f,d,a Move f 1
MOVFF fs,fd Move fs to fd 1
NEGF f,a Negate f 1
RLCF f,d,a Rotate left f through carry 1
RLNCF f,d,a Rotate left f (no carry) 1
RRCF f,d,a Rotate right f through carry 1
RRNCF f,d,a Rotate right f (no carry) 1
SETF f,a Set f 1
SUBFWB f,d,a Subtract from WREG with borrow 1
SUBWF f,d,a Subtract WREG from f 1
SUBWFB f,d,a Subtract WREG from f with borrow 1
SWAPF f,d,a Swap nibbles in f 1
TSTFSZ f,a Test f,skip if 0 1(2 or3)
XORWF f,d,a Exclusive OR WREG with f 1
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Bit Oriented Register Operands
The bit-oriented instructions perform operations on a specific bit of a file register. After the operation, the result is placed back in the same file register.
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Mnemonic Operand Description Cycles
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BCF f,b,a Bit clear f 1
BSF f,b,a Bit set f 1
BTFSC f,b,a Bit test f, skip if clear 1(2 or3)
BTFSS f,b,a Bit test f , skip if set 1(2 or3)
BTG f,b,a Bit toggle 1
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Control Operands
The control instructions such as branch and call deal mainly with flow control.
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Mnemonic Operand Description Cycles
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BC n Branch f carry 1
BN n Branch f negative 1
BRA n Branch Unconditionally 2
BNN n Branch f not negative 1
BNOV n Branch f not overflow 1
BNZ n Branch f not zero 1
BOV n Branch f overflow 1
NOP n No operation 1
BZ n Branch f zero 1
CALL n.s Call subroutine 2
POP Pop top of return Address 1
NOP No operator 1
PUSH Push top of return Address 1
RCALL n Relative call 2
RESET software device reset 1
RETURN s Return from subroutine 2
SLEEP Go into standby mode 1
RETLW k Return with literal in WREG 2
GOTO n Go to address 1st word 2
2nd word
CLRWDT - Clear Watchdog Timer 1
DAW - Decimal Adjust WREG 1
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Literal Operations
In this type of instruction, an operation is performed on the WREG register
and a fixed value called k.Because WREG is only 8-bit, the k value cannot be greater than 8-bit. Therefore, the k value is between 0-255 (00-FF in hex).
--------------------------------------------------------------------------------------------------------------------------Mnemonic Operand Description Cycles
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ADDLW k Add literal and WREG 1
ANDLW k AND literal with WREG 1
IORLW k Inclusive OR literal with WREG 1
LFSR f, k Move literal (12-bit)2nd word 2
to FSRx 1st word
MOVLB k Move literal to BSR <3:0> 1
MOVLW k Move literal to WREG 1
MULLW k Multiply literal with WREG 1
RETLW k Return with literal in WREG 2
SUBLW k Subtract WREG from literal 1
XORLW k Exclusive OR literal with WREG 1
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Data Memory to and from program memory operations
Data Memory and from program memory operations instructions allow us to read fixed data located in the program ROM of the PICI8. They also allow us to write into the program ROM if it is Flash memory.
--------------------------------------------------------------------------------------------------------------------------Mnemonic Operand Description Cycles
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TBLRD * Table Read 2
TBLRD *+ Table Read with post-increment 2
TBLRD *- Table Read with post-decrement 2
TBLRD +* Table Read with pre-increment 2
TBLWT * Table Write 2
TBLWT *+ Table Write with post-increment 2
TBLWT *- Table Write with post-decrement 2
TBLWT +* Table Write with pre-increment 2
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